Available native events and hardware information. -------------------------------------------------------------------------------- Vendor string and code : AuthenticAMD (2) Model string and code : AMD Family 10h (19) CPU Revision : 3.000000 CPU Megahertz : 2294.250977 CPU Clock Megahertz : 2294 CPU's in this Node : 8 Nodes in this System : 1 Total CPU's : 8 Number Hardware Counters : 4 Max Multiplex Counters : 32 -------------------------------------------------------------------------------- The following correspond to fields in the PAPI_event_info_t structure. Event Code Symbol | Long Description | -------------------------------------------------------------------------------- 0x40000000 DISPATCHED_FPU | Dispatched FPU Operations | 40001000 :OPS_ADD | Add pipe ops excluding load ops and SSE move ops | 40002000 :OPS_MULTIPLY | Multiply pipe ops excluding load ops and SSE move ops | 40004000 :OPS_STORE | Store pipe ops excluding load ops and SSE move ops | 40008000 :OPS_ADD_PIPE_LOAD_OPS | Add pipe load ops and SSE move ops | 40010000 :OPS_MULTIPLY_PIPE_LOAD_OPS | Multiply pipe load ops and SSE move ops | 40020000 :OPS_STORE_PIPE_LOAD_OPS | Store pipe load ops and SSE move ops | 40040000 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000001 CYCLES_NO_FPU_OPS_RETIRED | Cycles in which the FPU is Empty | -------------------------------------------------------------------------------- 0x40000002 DISPATCHED_FPU_OPS_FAST_FLAG | Dispatched Fast Flag FPU Operations | -------------------------------------------------------------------------------- 0x40000003 RETIRED_SSE_OPERATIONS | Retired SSE Operations | 40001003 :SINGLE_ADD_SUB_OPS | Single precision add/subtract ops | 40002003 :SINGLE_MUL_OPS | Single precision multiply ops | 40004003 :SINGLE_DIV_OPS | Single precision divide/square root ops | 40008003 :DOUBLE_ADD_SUB_OPS | Double precision add/subtract ops | 40010003 :DOUBLE_MUL_OPS | Double precision multiply ops | 40020003 :DOUBLE_DIV_OPS | Double precision divide/square root ops | 40040003 :OP_TYPE | Op type: 0=uops. 1=FLOPS | 40080003 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000004 RETIRED_MOVE_OPS | Retired Move Ops | 40001004 :LOW_QW_MOVE_UOPS | Merging low Quadword move uops | 40002004 :HIGH_QW_MOVE_UOPS | Merging high Quadword move uops | 40004004 :ALL_OTHER_MERGING_MOVE_UOPS | All other merging move uops | 40008004 :ALL_OTHER_MOVE_UOPS | All other move uops | 40010004 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000005 RETIRED_SERIALIZING_OPS | Retired Serializing Ops | 40001005 :SSE_BOTTOM_EXECUTING_UOPS | SSE bottom-executing uops retired | 40002005 :SSE_BOTTOM_SERIALIZING_UOPS | SSE bottom-serializing uops retired | 40004005 :X87_BOTTOM_EXECUTING_UOPS | x87 bottom-executing uops retired | 40008005 :X87_BOTTOM_SERIALIZING_UOPS | x87 bottom-serializing uops retired | 40010005 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000006 FP_SCHEDULER_CYCLES | Number of Cycles that a Serializing uop is in the FP Scheduler | 40001006 :BOTTOM_EXECUTE_CYCLES | Number of cycles a bottom-execute uop is in the FP scheduler | 40002006 :BOTTOM_SERIALIZING_CYCLES | Number of cycles a bottom-serializing uop is in the FP scheduler | 40004006 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000007 SEGMENT_REGISTER_LOADS | Segment Register Loads | 40001007 :ES | ES | 40002007 :CS | CS | 40004007 :SS | SS | 40008007 :DS | DS | 40010007 :FS | FS | 40020007 :GS | GS | 40040007 :HS | HS | 40080007 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000008 PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE | Pipeline Restart Due to Self-Modifying Code | -------------------------------------------------------------------------------- 0x40000009 PIPELINE_RESTART_DUE_TO_PROBE_HIT | Pipeline Restart Due to Probe Hit | -------------------------------------------------------------------------------- 0x4000000a LS_BUFFER_2_FULL_CYCLES | LS Buffer 2 Full | -------------------------------------------------------------------------------- 0x4000000b LOCKED_OPS | Locked Operations | 4000100b :EXECUTED | The number of locked instructions executed | 4000200b :CYCLES_SPECULATIVE_PHASE | The number of cycles spent in speculative phase | 4000400b :CYCLES_NON_SPECULATIVE_PHASE | The number of cycles spent in non-speculative phase (including cache mis | | s penalty) | 4000800b :CYCLES_WAITING | The number of cycles waiting for a cache hit (cache miss penalty). | 4001000b :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000000c RETIRED_CLFLUSH_INSTRUCTIONS | Retired CLFLUSH Instructions | -------------------------------------------------------------------------------- 0x4000000d RETIRED_CPUID_INSTRUCTIONS | Retired CPUID Instructions | -------------------------------------------------------------------------------- 0x4000000e CANCELLED_STORE_TO_LOAD_FORWARD_OPERATIONS | Cancelled Store to Load Forward Operations | 4000100e :ADDRESS_MISMATCHES | Address mismatches (starting byte not the same). | 4000200e :STORE_IS_SMALLER_THAN_LOAD | Store is smaller than load. | 4000400e :MISALIGNED | Misaligned. | 4000800e :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000000f SMIS_RECEIVED | SMIs Received | -------------------------------------------------------------------------------- 0x40000010 DATA_CACHE_ACCESSES | Data Cache Accesses | -------------------------------------------------------------------------------- 0x40000011 DATA_CACHE_MISSES | Data Cache Misses | -------------------------------------------------------------------------------- 0x40000012 DATA_CACHE_REFILLS | Data Cache Refills from L2 or Northbridge | 40001012 :SYSTEM | Refill from the northbridge | 40002012 :L2_SHARED | Shared-state line from L2 | 40004012 :L2_EXCLUSIVE | Exclusive-state line from L2 | 40008012 :L2_OWNED | Owned-state line from L2 | 40010012 :L2_MODIFIED | Modified-state line from L2 | 40020012 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000013 DATA_CACHE_REFILLS_FROM_SYSTEM | Data Cache Refills from the northbridge | 40001013 :INVALID | Invalid | 40002013 :SHARED | Shared | 40004013 :EXCLUSIVE | Exclusive | 40008013 :OWNED | Owned | 40010013 :MODIFIED | Modified | 40020013 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000014 DATA_CACHE_LINES_EVICTED | Data Cache Lines Evicted | 40001014 :INVALID | Invalid | 40002014 :SHARED | Shared | 40004014 :EXCLUSIVE | Exclusive | 40008014 :OWNED | Owned | 40010014 :MODIFIED | Modified | 40020014 :BY_PREFETCHNTA | Cache line evicted was brought into the cache with by a PrefetchNTA instruction. | 40040014 :NOT_BY_PREFETCHNTA | Cache line evicted was not brought into the cache with by a PrefetchNTA instructio | | n. | 40080014 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000015 L1_DTLB_MISS_AND_L2_DTLB_HIT | L1 DTLB Miss and L2 DTLB Hit | 40001015 :L2_4K_TLB_HIT | L2 4K TLB hit | 40002015 :L2_2M_TLB_HIT | L2 2M TLB hit | 40004015 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000016 L1_DTLB_AND_L2_DTLB_MISS | L1 DTLB and L2 DTLB Miss | 40001016 :4K_TLB_RELOAD | 4K TLB reload | 40002016 :2M_TLB_RELOAD | 2M TLB reload | 40004016 :1G_TLB_RELOAD | 1G TLB reload | 40008016 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000017 MISALIGNED_ACCESSES | Misaligned Accesses | -------------------------------------------------------------------------------- 0x40000018 MICROARCHITECTURAL_LATE_CANCEL_OF_AN_ACCESS | Microarchitectural Late Cancel of an Access | -------------------------------------------------------------------------------- 0x40000019 MICROARCHITECTURAL_EARLY_CANCEL_OF_AN_ACCESS | Microarchitectural Early Cancel of an Access | -------------------------------------------------------------------------------- 0x4000001a SCRUBBER_SINGLE_BIT_ECC_ERRORS | Single-bit ECC Errors Recorded by Scrubber | 4000101a :SCRUBBER_ERROR | Scrubber error | 4000201a :PIGGYBACK_ERROR | Piggyback scrubber errors | 4000401a :LOAD_PIPE_ERROR | Load pipe error | 4000801a :STORE_WRITE_PIPE_ERROR | Store write pipe error | 4001001a :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000001b PREFETCH_INSTRUCTIONS_DISPATCHED | Prefetch Instructions Dispatched | 4000101b :LOAD | Load (Prefetch, PrefetchT0/T1/T2) | 4000201b :STORE | Store (PrefetchW) | 4000401b :NTA | NTA (PrefetchNTA) | 4000801b :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000001c DCACHE_MISSES_BY_LOCKED_INSTRUCTIONS | DCACHE Misses by Locked Instructions | 4000101c :DATA_CACHE_MISSES_BY_LOCKED_INSTRUCTIONS | Data cache misses by locked instructions | 4000201c :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000001d L1_DTLB_HIT | L1 DTLB Hit | 4000101d :L1_4K_TLB_HIT | L1 4K TLB hit | 4000201d :L1_2M_TLB_HIT | L1 2M TLB hit | 4000401d :L1_1G_TLB_HIT | L1 1G TLB hit | 4000801d :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000001e INEFFECTIVE_SW_PREFETCHES | Ineffective Software Prefetches | 4000101e :SW_PREFETCH_HIT_IN_L1 | Software prefetch hit in the L1. | 4000201e :SW_PREFETCH_HIT_IN_L2 | Software prefetch hit in L2. | 4000401e :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000001f GLOBAL_TLB_FLUSHES | Global TLB Flushes | -------------------------------------------------------------------------------- 0x40000020 MEMORY_REQUESTS | Memory Requests by Type | 40001020 :NON_CACHEABLE | Requests to non-cacheable (UC) memory | 40002020 :WRITE_COMBINING | Requests to write-combining (WC) memory or WC buffer flushes to WB memory | 40004020 :STREAMING_STORE | Streaming store (SS) requests | 40008020 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000021 DATA_PREFETCHES | Data Prefetcher | 40001021 :CANCELLED | Cancelled prefetches | 40002021 :ATTEMPTED | Prefetch attempts | 40004021 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000022 SYSTEM_READ_RESPONSES | Northbridge Read Responses by Coherency State | 40001022 :EXCLUSIVE | Exclusive | 40002022 :MODIFIED | Modified | 40004022 :SHARED | Shared | 40008022 :DATA_ERROR | Data Error | 40010022 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000023 QUADWORDS_WRITTEN_TO_SYSTEM | Quadwords Written to System | 40001023 :QUADWORD_WRITE_TRANSFER | Quadword write transfer | 40002023 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000024 CPU_CLK_UNHALTED | CPU Clocks not Halted | -------------------------------------------------------------------------------- 0x40000025 REQUESTS_TO_L2 | Requests to L2 Cache | 40001025 :INSTRUCTIONS | IC fill | 40002025 :DATA | DC fill | 40004025 :TLB_WALK | TLB fill (page table walks) | 40008025 :SNOOP | Tag snoop request | 40010025 :CANCELLED | Cancelled request | 40020025 :HW_PREFETCH_FROM_DC | Hardware prefetch from DC | 40040025 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000026 L2_CACHE_MISS | L2 Cache Misses | 40001026 :INSTRUCTIONS | IC fill | 40002026 :DATA | DC fill (includes possible replays, whereas EventSelect 041h does not) | 40004026 :TLB_WALK | TLB page table walk | 40008026 :HW_PREFETCH_FROM_DC | Hardware prefetch from DC | 40010026 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000027 L2_FILL_WRITEBACK | L2 Fill/Writeback | 40001027 :L2_FILLS | L2 fills (victims from L1 caches, TLB page table walks and data prefetches) | 40002027 :L2_WRITEBACKS | L2 Writebacks to system. | 40004027 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000028 INSTRUCTION_CACHE_FETCHES | Instruction Cache Fetches | -------------------------------------------------------------------------------- 0x40000029 INSTRUCTION_CACHE_MISSES | Instruction Cache Misses | -------------------------------------------------------------------------------- 0x4000002a INSTRUCTION_CACHE_REFILLS_FROM_L2 | Instruction Cache Refills from L2 | -------------------------------------------------------------------------------- 0x4000002b INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM | Instruction Cache Refills from System | -------------------------------------------------------------------------------- 0x4000002c L1_ITLB_MISS_AND_L2_ITLB_HIT | L1 ITLB Miss and L2 ITLB Hit | -------------------------------------------------------------------------------- 0x4000002d L1_ITLB_MISS_AND_L2_ITLB_MISS | L1 ITLB Miss and L2 ITLB Miss | 4000102d :4K_PAGE_FETCHES | Instruction fetches to a 4K page. | 4000202d :2M_PAGE_FETCHES | Instruction fetches to a 2M page. | 4000402d :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000002e PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE | Pipeline Restart Due to Instruction Stream Probe | -------------------------------------------------------------------------------- 0x4000002f INSTRUCTION_FETCH_STALL | Instruction Fetch Stall | -------------------------------------------------------------------------------- 0x40000030 RETURN_STACK_HITS | Return Stack Hits | -------------------------------------------------------------------------------- 0x40000031 RETURN_STACK_OVERFLOWS | Return Stack Overflows | -------------------------------------------------------------------------------- 0x40000032 INSTRUCTION_CACHE_VICTIMS | Instruction Cache Victims | -------------------------------------------------------------------------------- 0x40000033 INSTRUCTION_CACHE_LINES_INVALIDATED | Instruction Cache Lines Invalidated | 40001033 :INVALIDATING_PROBE_NO_IN_FLIGHT | Invalidating probe that did not hit any in-flight instructions. | 40002033 :INVALIDATING_PROBE_ONE_OR_MORE_IN_FLIGHT | Invalidating probe that hit one or more in-flight instructio | | ns. | 40004033 :SMC_NO_IN_FLIGHT | SMC that did not hit any in-flight instructions. | 40008033 :SMC_ONE_OR_MORE_IN_FLIGHT | SMC that hit one or more in-flight instructions | 40010033 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000034 ITLB_RELOADS | ITLB Reloads | -------------------------------------------------------------------------------- 0x40000035 ITLB_RELOADS_ABORTED | ITLB Reloads Aborted | -------------------------------------------------------------------------------- 0x40000036 RETIRED_INSTRUCTIONS | Retired Instructions | -------------------------------------------------------------------------------- 0x40000037 RETIRED_UOPS | Retired uops | -------------------------------------------------------------------------------- 0x40000038 RETIRED_BRANCH_INSTRUCTIONS | Retired Branch Instructions | -------------------------------------------------------------------------------- 0x40000039 RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS | Retired Mispredicted Branch Instructions | -------------------------------------------------------------------------------- 0x4000003a RETIRED_TAKEN_BRANCH_INSTRUCTIONS | Retired Taken Branch Instructions | -------------------------------------------------------------------------------- 0x4000003b RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED | Retired Taken Branch Instructions Mispredicted | -------------------------------------------------------------------------------- 0x4000003c RETIRED_FAR_CONTROL_TRANSFERS | Retired Far Control Transfers | -------------------------------------------------------------------------------- 0x4000003d RETIRED_BRANCH_RESYNCS | Retired Branch Resyncs | -------------------------------------------------------------------------------- 0x4000003e RETIRED_NEAR_RETURNS | Retired Near Returns | -------------------------------------------------------------------------------- 0x4000003f RETIRED_NEAR_RETURNS_MISPREDICTED | Retired Near Returns Mispredicted | -------------------------------------------------------------------------------- 0x40000040 RETIRED_INDIRECT_BRANCHES_MISPREDICTED | Retired Indirect Branches Mispredicted | -------------------------------------------------------------------------------- 0x40000041 RETIRED_MMX_AND_FP_INSTRUCTIONS | Retired MMX/FP Instructions | 40001041 :X87 | x87 instructions | 40002041 :MMX_AND_3DNOW | MMX and 3DNow! instructions | 40004041 :PACKED_SSE_AND_SSE2 | SSE and SSE2 instructions | 40008041 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000042 RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS | Retired Fastpath Double Op Instructions | 40001042 :POSITION_0 | With low op in position 0 | 40002042 :POSITION_1 | With low op in position 1 | 40004042 :POSITION_2 | With low op in position 2 | 40008042 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000043 INTERRUPTS_MASKED_CYCLES | Interrupts-Masked Cycles | -------------------------------------------------------------------------------- 0x40000044 INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING | Interrupts-Masked Cycles with Interrupt Pending | -------------------------------------------------------------------------------- 0x40000045 INTERRUPTS_TAKEN | Interrupts Taken | -------------------------------------------------------------------------------- 0x40000046 DECODER_EMPTY | Decoder Empty | -------------------------------------------------------------------------------- 0x40000047 DISPATCH_STALLS | Dispatch Stalls | -------------------------------------------------------------------------------- 0x40000048 DISPATCH_STALL_FOR_BRANCH_ABORT | Dispatch Stall for Branch Abort to Retire | -------------------------------------------------------------------------------- 0x40000049 DISPATCH_STALL_FOR_SERIALIZATION | Dispatch Stall for Serialization | -------------------------------------------------------------------------------- 0x4000004a DISPATCH_STALL_FOR_SEGMENT_LOAD | Dispatch Stall for Segment Load | -------------------------------------------------------------------------------- 0x4000004b DISPATCH_STALL_FOR_REORDER_BUFFER_FULL | Dispatch Stall for Reorder Buffer Full | -------------------------------------------------------------------------------- 0x4000004c DISPATCH_STALL_FOR_RESERVATION_STATION_FULL | Dispatch Stall for Reservation Station Full | -------------------------------------------------------------------------------- 0x4000004d DISPATCH_STALL_FOR_FPU_FULL | Dispatch Stall for FPU Full | -------------------------------------------------------------------------------- 0x4000004e DISPATCH_STALL_FOR_LS_FULL | Dispatch Stall for LS Full | -------------------------------------------------------------------------------- 0x4000004f DISPATCH_STALL_WAITING_FOR_ALL_QUIET | Dispatch Stall Waiting for All Quiet | -------------------------------------------------------------------------------- 0x40000050 DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RSYNC | Dispatch Stall for Far Transfer or Resync to Retire | -------------------------------------------------------------------------------- 0x40000051 FPU_EXCEPTIONS | FPU Exceptions | 40001051 :X87_RECLASS_MICROFAULTS | x87 reclass microfaults | 40002051 :SSE_RETYPE_MICROFAULTS | SSE retype microfaults | 40004051 :SSE_RECLASS_MICROFAULTS | SSE reclass microfaults | 40008051 :SSE_AND_X87_MICROTRAPS | SSE and x87 microtraps | 40010051 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000052 DR0_BREAKPOINT_MATCHES | DR0 Breakpoint Matches | -------------------------------------------------------------------------------- 0x40000053 DR1_BREAKPOINT_MATCHES | DR1 Breakpoint Matches | -------------------------------------------------------------------------------- 0x40000054 DR2_BREAKPOINT_MATCHES | DR2 Breakpoint Matches | -------------------------------------------------------------------------------- 0x40000055 DR3_BREAKPOINT_MATCHES | DR3 Breakpoint Matches | -------------------------------------------------------------------------------- 0x40000056 DRAM_ACCESSES_PAGE | DRAM Accesses | 40001056 :HIT | DCT0 Page hit | 40002056 :MISS | DCT0 Page Miss | 40004056 :CONFLICT | DCT0 Page Conflict | 40008056 :DCT1_PAGE_HIT | DCT1 Page hit | 40010056 :DCT1_PAGE_MISS | DCT1 Page Miss | 40020056 :DCT1_PAGE_CONFLICT | DCT1 Page Conflict | 40040056 :WRITE_REQUEST | Write request | 40080056 :READ_REQUEST | Read request | 40100056 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000057 MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOWS | DRAM Controller Page Table Overflows | 40001057 :DCT0_PAGE_TABLE_OVERFLOW | DCT0 Page Table Overflow | 40002057 :DCT1_PAGE_TABLE_OVERFLOW | DCT1 Page Table Overflow | 40004057 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000058 MEMORY_CONTROLLER_SLOT_MISSES | Memory Controller DRAM Command Slots Missed | 40001058 :DCT0_COMMAND_SLOTS_MISSED | DCT0 Command Slots Missed | 40002058 :DCT1_COMMAND_SLOTS_MISSED | DCT1 Command Slots Missed | 40004058 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000059 MEMORY_CONTROLLER_TURNAROUNDS | Memory Controller Turnarounds | 40001059 :CHIP_SELECT | DCT0 DIMM (chip select) turnaround | 40002059 :READ_TO_WRITE | DCT0 Read to write turnaround | 40004059 :WRITE_TO_READ | DCT0 Write to read turnaround | 40008059 :DCT1_DIMM | DCT1 DIMM (chip select) turnaround | 40010059 :DCT1_READ_TO_WRITE_TURNAROUND | DCT1 Read to write turnaround | 40020059 :DCT1_WRITE_TO_READ_TURNAROUND | DCT1 Write to read turnaround | 40040059 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000005a MEMORY_CONTROLLER_BYPASS | Memory Controller Bypass Counter Saturation | 4000105a :HIGH_PRIORITY | Memory controller high priority bypass | 4000205a :LOW_PRIORITY | Memory controller medium priority bypass | 4000405a :DRAM_INTERFACE | DCT0 DCQ bypass | 4000805a :DRAM_QUEUE | DCT1 DCQ bypass | 4001005a :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000005b THERMAL_STATUS_AND_ECC_ERRORS | Thermal Status | 4000105b :CLKS_DIE_TEMP_TOO_HIGH | Number of times the HTC trip point is crossed | 4000205b :CLKS_TEMP_THRESHOLD_EXCEEDED | Number of clocks when STC trip point active | 4000405b :STC_TRIP_POINTS_CROSSED | Number of times the STC trip point is crossed | 4000805b :CLOCKS_HTC_P_STATE_INACTIVE | Number of clocks HTC P-state is inactive. | 4001005b :CLOCKS_HTC_P_STATE_ACTIVE | Number of clocks HTC P-state is active | 4002005b :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000005c CPU_IO_REQUESTS_TO_MEMORY_IO | CPU/IO Requests to Memory/IO | 4000105c :I_O_TO_I_O | IO to IO | 4000205c :I_O_TO_MEM | IO to Mem | 4000405c :CPU_TO_I_O | CPU to IO | 4000805c :CPU_TO_MEM | CPU to Mem | 4001005c :TO_REMOTE_NODE | To remote node | 4002005c :TO_LOCAL_NODE | To local node | 4004005c :FROM_REMOTE_NODE | From remote node | 4008005c :FROM_LOCAL_NODE | From local node | 4010005c :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000005d CACHE_BLOCK | Cache Block Commands | 4000105d :VICTIM_WRITEBACK | Victim Block (Writeback) | 4000205d :DCACHE_LOAD_MISS | Read Block (Dcache load miss refill) | 4000405d :SHARED_ICACHE_REFILL | Read Block Shared (Icache refill) | 4000805d :READ_BLOCK_MODIFIED | Read Block Modified (Dcache store miss refill) | 4001005d :READ_TO_DIRTY | Change to Dirty (first store to clean block already in cache) | 4002005d :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000005e SIZED_COMMANDS | Sized Commands | 4000105e :NON_POSTED_WRITE_BYTE | Non-Posted SzWr Byte (1-32 bytes) Legacy or mapped IO, typically 1-4 bytes | 4000205e :NON_POSTED_WRITE_DWORD | Non-Posted SzWr Dword (1-16 dwords) Legacy or mapped IO, typically 1 dword | 4000405e :POSTED_WRITE_BYTE | Posted SzWr Byte (1-32 bytes) Sub-cache-line DMA writes, size varies; also flushes | | of | 4000805e :POSTED_WRITE_DWORD | Posted SzWr Dword (1-16 dwords) Block-oriented DMA writes, often cache-line sized; | | also | 4001005e :READ_BYTE_4_BYTES | SzRd Byte (4 bytes) Legacy or mapped IO | 4002005e :READ_DWORD_1_16_DWORDS | SzRd Dword (1-16 dwords) Block-oriented DMA reads, typically cache-line size | 4004005e :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000005f PROBE | Probe Responses and Upstream Requests | 4000105f :MISS | Probe miss | 4000205f :HIT_CLEAN | Probe hit clean | 4000405f :HIT_DIRTY_NO_MEMORY_CANCEL | Probe hit dirty without memory cancel (probed by Sized Write or Change2Dir | | ty) | 4000805f :HIT_DIRTY_WITH_MEMORY_CANCEL | Probe hit dirty with memory cancel (probed by DMA read or cache refill r | | equest) | 4001005f :UPSTREAM_DISPLAY_REFRESH_READS | Upstream display refresh/ISOC reads | 4002005f :UPSTREAM_NON_DISPLAY_REFRESH_READS | Upstream non-display refresh reads | 4004005f :UPSTREAM_WRITES | Upstream ISOC writes | 4008005f :UPSTREAM_NON_ISOC_WRITES | Upstream non-ISOC writes | 4010005f :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000060 GART | GART Events | 40001060 :APERTURE_HIT_FROM_CPU | GART aperture hit on access from CPU | 40002060 :APERTURE_HIT_FROM_IO | GART aperture hit on access from IO | 40004060 :MISS | GART miss | 40008060 :REQUEST_HIT_TABLE_WALK | GART/DEV Request hit table walk in progress | 40010060 :DEV_HIT | DEV hit | 40020060 :DEV_MISS | DEV miss | 40040060 :DEV_ERROR | DEV error | 40080060 :MULTIPLE_TABLE_WALK | GART/DEV multiple table walk in progress | 40100060 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000061 MEMORY_CONTROLLER_REQUESTS | Memory Controller Requests | 40001061 :WRITE_REQUESTS | Write requests sent to the DCT | 40002061 :READ_REQUESTS | Read requests (including prefetch requests) sent to the DCT | 40004061 :PREFETCH_REQUESTS | Prefetch requests sent to the DCT | 40008061 :32_BYTES_WRITES | 32 Bytes Sized Writes | 40010061 :64_BYTES_WRITES | 64 Bytes Sized Writes | 40020061 :32_BYTES_READS | 32 Bytes Sized Reads | 40040061 :64_BYTES_READS | 64 Byte Sized Reads | 40080061 :READ_REQUESTS_WHILE_WRITES_REQUESTS | Read requests sent to the DCT while writes requests are pending i | | n the DCT | 40100061 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000062 CPU_TO_DRAM_REQUESTS_TO_TARGET_NODE | CPU to DRAM Requests to Target Node | 40001062 :LOCAL_TO_0 | From Local node to Node 0 | 40002062 :LOCAL_TO_1 | From Local node to Node 1 | 40004062 :LOCAL_TO_2 | From Local node to Node 2 | 40008062 :LOCAL_TO_3 | From Local node to Node 3 | 40010062 :LOCAL_TO_4 | From Local node to Node 4 | 40020062 :LOCAL_TO_5 | From Local node to Node 5 | 40040062 :LOCAL_TO_6 | From Local node to Node 6 | 40080062 :LOCAL_TO_7 | From Local node to Node 7 | 40100062 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000063 IO_TO_DRAM_REQUESTS_TO_TARGET_NODE | IO to DRAM Requests to Target Node | 40001063 :LOCAL_TO_0 | From Local node to Node 0 | 40002063 :LOCAL_TO_1 | From Local node to Node 1 | 40004063 :LOCAL_TO_2 | From Local node to Node 2 | 40008063 :LOCAL_TO_3 | From Local node to Node 3 | 40010063 :LOCAL_TO_4 | From Local node to Node 4 | 40020063 :LOCAL_TO_5 | From Local node to Node 5 | 40040063 :LOCAL_TO_6 | From Local node to Node 6 | 40080063 :LOCAL_TO_7 | From Local node to Node 7 | 40100063 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000064 CPU_READ_COMMAND_LATENCY_TO_TARGET_NODE_0_3 | CPU Read Command Latency to Target Node 0-3 | 40001064 :READ_BLOCK | Read block | 40002064 :READ_BLOCK_SHARED | Read block shared | 40004064 :READ_BLOCK_MODIFIED | Read block modified | 40008064 :CHANGE_TO_DIRTY | Change to Dirty | 40010064 :LOCAL_TO_0 | From Local node to Node 0 | 40020064 :LOCAL_TO_1 | From Local node to Node 1 | 40040064 :LOCAL_TO_2 | From Local node to Node 2 | 40080064 :LOCAL_TO_3 | From Local node to Node 3 | 40100064 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000065 CPU_READ_COMMAND_REQUESTS_TO_TARGET_NODE_0_3 | CPU Read Command Requests to Target Node 0-3 | 40001065 :READ_BLOCK | Read block | 40002065 :READ_BLOCK_SHARED | Read block shared | 40004065 :READ_BLOCK_MODIFIED | Read block modified | 40008065 :CHANGE_TO_DIRTY | Change to Dirty | 40010065 :LOCAL_TO_0 | From Local node to Node 0 | 40020065 :LOCAL_TO_1 | From Local node to Node 1 | 40040065 :LOCAL_TO_2 | From Local node to Node 2 | 40080065 :LOCAL_TO_3 | From Local node to Node 3 | 40100065 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000066 CPU_READ_COMMAND_LATENCY_TO_TARGET_NODE_4_7 | CPU Read Command Latency to Target Node 4-7 | 40001066 :READ_BLOCK | Read block | 40002066 :READ_BLOCK_SHARED | Read block shared | 40004066 :READ_BLOCK_MODIFIED | Read block modified | 40008066 :CHANGE_TO_DIRTY | Change to Dirty | 40010066 :LOCAL_TO_4 | From Local node to Node 4 | 40020066 :LOCAL_TO_5 | From Local node to Node 5 | 40040066 :LOCAL_TO_6 | From Local node to Node 6 | 40080066 :LOCAL_TO_7 | From Local node to Node 7 | 40100066 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000067 CPU_READ_COMMAND_REQUESTS_TO_TARGET_NODE_4_7 | CPU Read Command Requests to Target Node 4-7 | 40001067 :READ_BLOCK | Read block | 40002067 :READ_BLOCK_SHARED | Read block shared | 40004067 :READ_BLOCK_MODIFIED | Read block modified | 40008067 :CHANGE_TO_DIRTY | Change to Dirty | 40010067 :LOCAL_TO_4 | From Local node to Node 4 | 40020067 :LOCAL_TO_5 | From Local node to Node 5 | 40040067 :LOCAL_TO_6 | From Local node to Node 6 | 40080067 :LOCAL_TO_7 | From Local node to Node 7 | 40100067 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000068 CPU_COMMAND_LATENCY_TO_TARGET_NODE_0_3_4_7 | CPU Command Latency to Target Node 0-3/4-7 | 40001068 :READ_SIZED | Read Sized | 40002068 :WRITE_SIZED | Write Sized | 40004068 :VICTIM_BLOCK | Victim Block | 40008068 :NODE_GROUP_SELECT | Node Group Select. 0=Nodes 0-3. 1= Nodes 4-7. | 40010068 :LOCAL_TO_0_4 | From Local node to Node 0/4 | 40020068 :LOCAL_TO_1_5 | From Local node to Node 1/5 | 40040068 :LOCAL_TO_2_6 | From Local node to Node 2/6 | 40080068 :LOCAL_TO_3_7 | From Local node to Node 3/7 | 40100068 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000069 CPU_REQUESTS_TO_TARGET_NODE_0_3_4_7 | CPU Requests to Target Node 0-3/4-7 | 40001069 :READ_SIZED | Read Sized | 40002069 :WRITE_SIZED | Write Sized | 40004069 :VICTIM_BLOCK | Victim Block | 40008069 :NODE_GROUP_SELECT | Node Group Select. 0=Nodes 0-3. 1= Nodes 4-7. | 40010069 :LOCAL_TO_0_4 | From Local node to Node 0/4 | 40020069 :LOCAL_TO_1_5 | From Local node to Node 1/5 | 40040069 :LOCAL_TO_2_6 | From Local node to Node 2/6 | 40080069 :LOCAL_TO_3_7 | From Local node to Node 3/7 | 40100069 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000006a HYPERTRANSPORT_LINK0 | HyperTransport Link 0 Transmit Bandwidth | 4000106a :COMMAND_DWORD_SENT | Command dword sent | 4000206a :DATA_DWORD_SENT | Data dword sent | 4000406a :BUFFER_RELEASE_DWORD_SENT | Buffer release dword sent | 4000806a :NOP_DWORD_SENT | Nop dword sent (idle) | 4001006a :ADDRESS_EXT_DWORD_SENT | Address extension dword sent | 4002006a :PER_PACKET_CRC_SENT | Per packet CRC sent | 4004006a :SUBLINK_MASK | SubLink Mask | 4008006a :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000006b HYPERTRANSPORT_LINK1 | HyperTransport Link 1 Transmit Bandwidth | 4000106b :COMMAND_DWORD_SENT | Command dword sent | 4000206b :DATA_DWORD_SENT | Data dword sent | 4000406b :BUFFER_RELEASE_DWORD_SENT | Buffer release dword sent | 4000806b :NOP_DWORD_SENT | Nop dword sent (idle) | 4001006b :ADDRESS_EXT_DWORD_SENT | Address extension dword sent | 4002006b :PER_PACKET_CRC_SENT | Per packet CRC sent | 4004006b :SUBLINK_MASK | SubLink Mask | 4008006b :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000006c HYPERTRANSPORT_LINK2 | HyperTransport Link 2 Transmit Bandwidth | 4000106c :COMMAND_DWORD_SENT | Command dword sent | 4000206c :DATA_DWORD_SENT | Data dword sent | 4000406c :BUFFER_RELEASE_DWORD_SENT | Buffer release dword sent | 4000806c :NOP_DWORD_SENT | Nop dword sent (idle) | 4001006c :ADDRESS_EXT_DWORD_SENT | Address extension dword sent | 4002006c :PER_PACKET_CRC_SENT | Per packet CRC sent | 4004006c :SUBLINK_MASK | SubLink Mask | 4008006c :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000006d HYPERTRANSPORT_LINK3 | HyperTransport Link 3 Transmit Bandwidth | 4000106d :COMMAND_DWORD_SENT | Command dword sent | 4000206d :DATA_DWORD_SENT | Data dword sent | 4000406d :BUFFER_RELEASE_DWORD_SENT | Buffer release dword sent | 4000806d :NOP_DWORD_SENT | Nop dword sent (idle) | 4001006d :ADDRESS_EXT_DWORD_SENT | Address extension dword sent | 4002006d :PER_PACKET_CRC_SENT | Per packet CRC sent | 4004006d :SUBLINK_MASK | SubLink Mask | 4008006d :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000006e READ_REQUEST_TO_L3_CACHE | Read Request to L3 Cache | 4000106e :READ_BLOCK_EXCLUSIVE | Read Block Exclusive (Data cache read) | 4000206e :READ_BLOCK_SHARED | Read Block Shared (Instruction cache read) | 4000406e :READ_BLOCK_MODIFY | Read Block Modify | 4000806e :CORE_0_SELECT | Core 0 Select | 4001006e :CORE_1_SELECT | Core 1 Select | 4002006e :CORE_2_SELECT | Core 2 Select | 4004006e :CORE_3_SELECT | Core 3 Select | 4008006e :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x4000006f L3_CACHE_MISSES | L3 Cache Misses | 4000106f :READ_BLOCK_EXCLUSIVE | Read Block Exclusive (Data cache read) | 4000206f :READ_BLOCK_SHARED | Read Block Shared (Instruction cache read) | 4000406f :READ_BLOCK_MODIFY | Read Block Modify | 4000806f :CORE_0_SELECT | Core 0 Select | 4001006f :CORE_1_SELECT | Core 1 Select | 4002006f :CORE_2_SELECT | Core 2 Select | 4004006f :CORE_3_SELECT | Core 3 Select | 4008006f :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000070 L3_FILLS_CAUSED_BY_L2_EVICTIONS | L3 Fills caused by L2 Evictions | 40001070 :SHARED | Shared | 40002070 :EXCLUSIVE | Exclusive | 40004070 :OWNED | Owned | 40008070 :MODIFIED | Modified | 40010070 :CORE_0_SELECT | Core 0 Select | 40020070 :CORE_1_SELECT | Core 1 Select | 40040070 :CORE_2_SELECT | Core 2 Select | 40080070 :CORE_3_SELECT | Core 3 Select | 40100070 :ALL | All sub-events selected | -------------------------------------------------------------------------------- 0x40000071 L3_EVICTIONS | L3 Evictions | 40001071 :SHARED | Shared | 40002071 :EXCLUSIVE | Exclusive | 40004071 :OWNED | Owned | 40008071 :MODIFIED | Modified | 40010071 :ALL | All sub-events selected | -------------------------------------------------------------------------------- -------------------------------------------------------------------------------- Total events reported: 114 native_avail.c PASSED